2-to-1 and 4-to-1 MUX mode

A multiplexer selects one signal from multiple inputs and sends it to a single output path. In CIS, each “input” is a pixel column’s signal, and the “output” is a readout amplifier/ADC channel.

• Operation:
  • Two pixel columns share one readout channel.
  • The sensor reads them sequentially within the same clock cycle group.
• Effect:
  • Cuts the number of simultaneous readout channels in half.
  • Reduces output data rate requirement (bandwidth).
  • Can reduce power consumption.
  • Frame rate is usually halved compared to full parallel readout.
• Use Case:
  • When system interface bandwidth is limited.
  • Lower frame rate or lower power applications.

• Operation:
  • Four pixel columns share one readout channel.
  • The readout circuitry cycles through each of the four columns in turn.
• Effect:
  • Reduces output data lanes to ¼ of full parallel readout.
  • Significantly lowers required output bandwidth.
  • Frame rate drops to about ¼ of maximum (unless ROI/windowing is applied).
• Use Case:
  • Power-sensitive imaging.
  • Applications where full frame rate is not required but the same resolution is needed.
  • Simplifying downstream electronics.

Imagine 8 pixel columns:

• Normal mode: 8 columns → 8 ADCs → 8 output lanes.
• 2-to-1 mode: 8 columns → 4 ADCs → 4 output lanes (each ADC serves 2 columns).
• 4-to-1 mode: 8 columns → 2 ADCs → 2 output lanes (each ADC serves 4 columns).

• Lower Interface Bandwidth: Smaller number of high-speed lanes.
• Lower Power Consumption: Fewer ADCs active at once.
• Flexibility: Can switch between high-speed/high-power and low-speed/low-power modes.

• Lower frame rate unless combined with ROI or pixel binning.
• Possible slight increase in read noise if sharing analog circuits.